SMART is a major research enterprise established by the Massachusetts Institute of Technology (MIT) in partnership with the National Research Foundation of Singapore (NRF). SMART serves as an intellectual hub for international research collaborations, not only between MIT and Singapore, but also involving researchers from the region and beyond. At SMART, we identify and carry out research on critical problems of societal importance. SMART is a magnet for attracting and anchoring global research talent, while simultaneously instilling and promoting a culture of translational research and entrepreneurship in Singapore. Five interdisciplinary research groups (IRGs) are currently in operation: Antimicrobial Resistance (AMR), Critical Analytics for Manufacturing Personalized-Medicine (CAMP), Disruptive & Sustainable Technologies for Agricultural Precision (DiSTAP), Future Urban Mobility (FM), and Low Energy Electronics Systems (LEES). In addition, SMART also operates an Innovation Centre.

Job Description

The project focuses on the creation of monolithic CMOS + GaN HEMT integrated circuits for 5G applications.

We are seeking an individual to develop CMOS + GaN HEMT circuits for 5G applications using the circuit design platform developed by SMART LEES. The candidate will work in a team to develop fabrication processes for GaN HEMTs with fab partners implementing SMART LEES' monolithic integration flow. The job role includes:

• Layout design, process development, fabrication and characterization of GaN based transistors for next-generation communications and power electronics applications
• Coordination with LEES' industrial partners to design and implement wireless circuit systems comprising CMOS digital control blocks and GaN PA devices
• Collaboration with LEES' research partners to conduct RF and system testing of CMOS + GaN PA circuits

Job Requirements

• PhD in Electrical Engineering, Applied Physics or a related field Semiconductor fabrication experience in a cleanroom, using tools including but not limited to mask aligner, wet bench, plasma tools, RTA, sputtering systems, evaporators etc.
• Knowledge of III-V semiconductor transistor physics and fabrication processes, particularly of field effect transistors (FET) and high electron mobility transistors (HEMT)
• Knowledge of RF and mmWave technologies, particularly of RF/mmWave characterization techniques for transistors, including small-signal S-parameter, noise and load-pull
• The following skills and knowledge will be advantageous:
  • Knowledge of material physics about Gallium Nitride (GaN) • Programming with MATLAB, Labview etc.
  • Experience with physics-based semiconductor CAD software, e.g. Silvaco TCAD
  • Good command of written and spoken English
  • Ability to work independently and as part of an interdisciplinary team

To apply, please visit our website at: http://smart.mit.edu/careers/career-opportunities. Interested applicants are invited to send in their full CV/resume, cover letter and list of three references (to include reference names and contact information). We regret that only shortlisted candidates will be notified.